Chelsio Communications Chelsio T5 User's Guide download pdf (Page 54)

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Chapter II. Network (NIC/TOE)

Chelsio T5/T4 Unified Wire For Linux Page 54

Then on the receiver host, look at interrupt rate at /proc/interrupts:

[root@receiver_host]# cat /proc/interrupts | grep eth6

Id CPU0 CPU1 CPU2 CPU3 type interface

36: 115229 0 0 1 PCI-MSI-edge eth6 (queue 0)

37: 0 121083 1 0 PCI-MSI-edge eth6 (queue 1)

38: 0 0 105423 1 PCI-MSI-edge eth6 (queue 2)

39: 0 0 0 115724 PCI-MSI-edge eth6 (queue 3)

Now interrupts from eth6 are evenly distributed among the 4 CPUs.

Without T5/T4’s RSS support, the interrupts caused by network traffic may be distributed

unevenly over CPUs. For your information, the traffic produced by the same iperf commands

gives the following output in /proc/interrupts.

[root@receiver_host]# cat /proc/interrupts | grep eth6

Id CPU0 CPU1 CPU2 CPU3 type interface

36: 0 9 0 17418 PCI-MSI-edge eth6 (queue 0)

37: 0 0 21718 2063 PCI-MSI-edge eth6 (queue 1)

38: 0 7 391519 222 PCI-MSI-edge eth6 (queue 2)

39: 1 0 33 17798 PCI-MSI-edge eth6 (queue 3)

Here there are 4 receiving queues from the eth6 interface, but they are not bound to a specific

CPU or interrupt entry. Queue 2 has caused a very large number of interrupts on CPU2 while

CPU0 and CPU1 are barely used by any of the four queues. Enabling RSS is thus essential for

best performance.

Linux’s irqbalance may take charge of distributing interrupts among CPUs on a

multiprocessor platform. However, irqbalance distributes interrupt requests

from all hardware devices across processors. For a server with T5/T4 network

card constantly receiving large volume of data at 10Gbps, the network interrupt

demands are significantly high. Under such circumstances, it is necessary to

enable RSS to balance the network load across multiple processors and achieve

the best performance.

Note

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